Semiconductors
EUV Needs More Than a Scanner: The Resist and the Stage Nobody Credits
A scanner prints nothing without a photoresist that reacts to EUV and a stage that positions the wafer to nanometers. TSMC and ASML grants show both.
Latest Articles
12 articles indexedSemiconductors
What Actually Gates the AI Hardware Buildout: A Synthesis From the Patent Record
Packaging, memory bandwidth, and the interconnect — not the transistor alone — set the ceiling on AI hardware. Read across the 2026 grants, the bottleneck is legible.
Chokepoint
Semiconductors
The Mirrors Behind EUV: Why Zeiss and ASML Optics Are a Chokepoint Inside a Chokepoint
ASML builds the only EUV scanners, but the optics inside them come from a supply chain just as narrow. Two 2026 grants show how exacting those mirrors are.
Semiconductors
NVIDIA Patents the Data, Not Just the Chip
A June 2026 NVIDIA grant on data-set generation and augmentation shows the company staking the workload that feeds its silicon — a tell about where the moat really sits.
Semiconductors
The DRAM Cell Is the Real Memory Wall: Reading Samsung's 2026 Grants
HBM bandwidth grabs headlines, but capacity comes from shrinking the DRAM cell — and that is getting structurally brutal. Samsung's June 2026 grants show how brutal.
Semiconductors
Feeding Power to a 3D Stack: Intel's Composite-Bridge Grant, Decoded
Once you stack logic and memory vertically, getting clean power up through the stack becomes its own engineering problem. Intel's 2026 grant claims one fix.
Semiconductors
Scale-Up Interconnect: What CXL, UALink, and NVLink Are Actually Competing Over
Beyond the chip and the package sits the rack-level fabric. A 2026 UnifabriX grant names CXL, UALink, NVLink, and Ethernet in one breath — and shows what they share.
Semiconductors
Anatomy of a Chiplet: The Die-to-Die Link Doing the Work
Chiplets only work if the wire between them is fast and clean. Eliyan's and AMD's 2026 grants show what a die-to-die interface actually has to solve.
Semiconductors
Backside Power and Stacked Transistors: Reading IBM's 2026 Thicket
Two of the hardest moves at the leading edge — backside power delivery and stacked FETs — show up together in IBM's June 2026 grants. Here's what the claims actually cover.
Semiconductors
Bandwidth Math: How Stacked Memory Feeds the GPU, Read Through the Patents
HBM's whole reason to exist is bytes per second. Intel's and Xilinx's 2026 grants on stacked memory and vertical connections show how the bandwidth is built.
Semiconductors
Why Advanced Packaging, Not 2nm, Is Gating the AI Buildout
The bottleneck in the AI hardware supply chain moved from the transistor to the package. TSMC's and Samsung's 2026 grants show what that bottleneck is made of.
Semiconductors
The EUV Pellicle Problem: A Single Membrane Is Quietly Gating Sub-2nm Yield
EUV lithography is an ASML monopoly, but a thinner chokepoint sits on the mask itself. TSMC's own grants show where the pellicle physics actually bites.